USB 2.0 PHY IP Core Device Host OTG Hub in TSMC, 28HPC, 40LP /LL, UMC, 40LP, 28HPC, SMIC 14SF, SF, 55LL, 40LL - T2M-IP
Mixed-Signal Verification for USB 2.0 Physical Layer IP
HSIC USB 2.0 PHY IP
Webcam - Encore Electronics Inc.
USB 2.0 Full High Speed Solution | NXP Semiconductors
PCIe/USB/SATA PHY Application Example | Renesas
USB 2.0 PHY IP Core
Synopsys IP Technical Bulletin: USB High Speed Inter-Chip (HSIC) IP: What is it? And why should I use it?
USB 2.0 PHY IP core | Arasan Chip Systems
USB3 Controller | Cadence
Full Speed USB 2.0 Hub Controller - EEWeb
USB2 PHY | Cadence
Archimago's Musings: MEASUREMENTS: Computer USB port noise, USB hubs and the 8kHz PHY Microframe Packet Noise
USB Universal Serial Bus
PhyWhisperer-USB | Crowd Supply
Figure 2 from Verilog synthesis of USB 2.0 full-speed device PHY IP | Semantic Scholar
Teledyne LeCroy - USB and USB Type-C® Electrical Test Solutions
Canovatech - CT25201
TUSB1210 data sheet, product information and support | TI.com
USBPHYC internal peripheral - stm32mpu
